Speaker
Description
High-Voltage CMOS (HVCMOS) pixel sensors are promising candidates for tracking applications in future high-energy physics experiments due to their excellent comprehensive performance in terms of radiation resistance, time resolution, position resolution and power dissipation. Driven by the requirements of Upstream Pixel Tracker in the LHCb Upgrade II and future electron-positron colliders, a series of prototypes named COFFEE are developed in a 55 nm HVCMOS process. While maintaining high spatial resolution and reasonable power consumption, we aim to achieve a few nanosecond time resolution under hit density up to 100 MHz/cm2. Building on the validation of sensing diode and the in-pixel amplification in COFFEE2, COFFEE3 in this work focuses on time measurement and high-density hit readout. Two distinct readout schemes and some test structures have been developed. One scheme only digitizes within the pixel and then parallelly transfers the data to the bottom of the array for time stamping; the other integrates a coarse-fine TDC based within each pixel. The time information is first stored locally in the pixel and then transmitted to the bottom of the array through the column-level data bus in order of priority. Both architectures are expected to achieve a time resolution of within 5ns, but they have different performance focuses in terms of the ability to handle high hit rate or low power consumption. This report will present the design and preliminary test results of COFFEE3, along with its planned future developments.
