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Description
Calorimeters play a vital role in particle acceleration experiments. Their readout systems are confronted with the dual challenges of unpredictable particle responses and nanosecond-scale signal fluctuations. Attaining a resolution below 5%, a dynamic range of 60 dB with low power consumption continues to pose significant technical challenges. This study is grounded in the architecture of first-order Delta-Sigma Modulation (DSM), including an integrator, a comparator, a latch and a Time to Digital Convertor (TDC), realizing real-time readout of charge signals with a dynamic range of 160 fC-160 pC. To enhance the time/energy resolution and low power, a two-step TDC has been developed to achieve a better compromise between resolution and dynamic range. It comprises a counter-type TDC and a delay chain TDC as coarse and fine counts separately. The dynamic range of the TDC is about 640 ns with a LSB of 70 ps, and a measurement error of less than 1.3 LSB, with an rms value of about 3 ps. The preliminary test results show that the total energy nonlinear error is less than 3.81% which is encouraging. The total power consumption is about 6.12 mW using 180nm CMOS process.